Intel processors: new features for high security and (ki) performance

Intel processors: new features for high security and (ki) performance

New Intel processors planned for 2021 also bring a number of new functions. Some of them now introduces Intel. Some of the new features strong safety, for example, already available from Tiger Lake (Core I Generation 11) "Key loose". Other such as AVX-VNNI and the AMX-Tile Matrix Multiply Unit (TMUL) promise high performance, some should improve the efficient use of the upcoming hybrid processors with Core I and Atomic Core.

Most of the now published innovations relate to the FUR 2021 planned 10-nanometer processors Alder Lake (for desktop PCs, probably with the catch LGA1700) and Sapphire Rapids (Fur Server). The latter brings about DDR5 RAM and PCI Express 5.0.

Hybrid control

After the hopefully last 14 nanometer processor for desktop PCs called Rocket Lake-S comes in the second half of 2021 the hybrid Alder Lake with strong core-I and economical atomic nuclei. His Core I cores were allowed to microarchitecture generation "Golden Cove" According and the atomic cores too "Gracemont".

In the document " Intel Architecture Instruction Set Extensions and Future Features Programming Reference " From October 2020 Intel clearly states that Alder Lake – unlike its transaction Tiger Lake – will not have AVX-512 units. This is probably simply because the atomic cores do not have them. Instead, Alder Lake gets a 256-bit version of the vector Neural Network Instructions (VNNI) as AVX-VNNI. These commands should mainly accelerate Ki-inferencing, ie the use of KI algorithms on data.

Intel processors: new features for high security and (ki) performance

Intel’s Trusted Domain Extensions (TDX) Scots VMS on servers against each other and against the VMM.

For the task scheduler of the operating system to spread running threads optimally to the different CPU core types, there is a marking for this in the CPUID function. It features the cores as expected as "Core I" or "atom". But new is also an enhanced feedback interface (EHFI), which should facilitate the scheduler the decision, which core is best suited depending on the operating condition and thread class.

AMX-TMUL

With Sapphire Rapids, Intel also brings the Advanced Matrix Extensions AMX for the first time. The first AMX implementation now describes a Tile Matrix Multiply Unit (TMUL), especially for KI and Machine Learning Algorithms, which use data formats such as Bfloat 16 (BF16) and 8-bit integers (INT8) (AMX-BF16 , AMX-INT8, AMX-TILE).

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